LiteX-Acorn-Baseboard is a baseboard developed around the SQRL's Acorn board (or Nite/LiteFury) expanding their possibilities

Overview
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[> Intro

The LiteX-Acorn-Baseboard is a baseboard developed around the SQRL's Acorn board (or Nite/LiteFury) expanding their possibilities with:

  • A PCIe X1 connector.
  • A SFP connector.
  • A M2 SATA slot.
  • An EPC5 FPGA (connected to the Acorn through a SerDes link) and providing:
  • A JTAG/UART port.
  • A 1Gbps Ethernet port (RGMII).
  • A HDMI Out port.
  • A SDCard slot.
  • 4 PMODs.
  • 2 Buttons.
  • A LCD.
  • 2 SATA connectors (connected to the ECP5's SerDeses).

The board is mainly intended to be used as a development board for LiteX: From regression testing to development of new features; but can also be a nice and cheap FPGA development board for developers willing to play with PCIe, SFP, SATA, etc... or wanting to create an standalone and open source Linux platforms.

[> Prerequisites

  • Python3, Vivado.
  • Either a Vivado-compatible JTAG cable (native or XVCD), or OpenOCD.

[> Installing LiteX

$ wget https://raw.githubusercontent.com/enjoy-digital/litex/master/litex_setup.py
$ chmod +x litex_setup.py
$ sudo ./litex_setup.py init install

... or follow the installation instructions if the LiteX Wiki: https://github.com/enjoy-digital/litex/wiki/Installation

[> Designs

TODO

[> Contact

E-mail: [email protected]

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Comments
  • Cleanup and fix SFP 1G test

    Cleanup and fix SFP 1G test

    Closes https://github.com/enjoy-digital/litex-acorn-baseboard/issues/3. Relies on https://github.com/enjoy-digital/liteeth/pull/102.

    The only fix here is the RX pair polarity fix; I removed PCIe / DRAM / CPU for clarity and quicker builds. Tested with Ubiquiti UF-RJ45-1G; ping and etherbone work:

    64 bytes from 192.168.1.50: icmp_seq=1 ttl=128 time=0.210 ms
    
    0x00000000 : 0x00000000 ctrl_reset
    0x00000004 : 0x12345678 ctrl_scratch
    0x00000008 : 0x00000000 ctrl_bus_errors
    0x00001000 : 0x00000000 leds_out
    
    opened by sergachev 1
  • LCD: Write proper SSD1306 lib.

    LCD: Write proper SSD1306 lib.

    An existing lib has been quickly adapted for https://github.com/enjoy-digital/litex-acorn-baseboard/tree/master/bringup/ecp5_lcd/firmware. Write a proper lib.

    enhancement 
    opened by enjoy-digital 0
  • Bringup: Validate Acorn <> ECP5 Link.

    Bringup: Validate Acorn <> ECP5 Link.

    Reuse https://github.com/enjoy-digital/litex-acorn-baseboard/issues/3 and adapt pins to Acorn <> ECP5 lane. Adapt https://github.com/enjoy-digital/liteiclink/blob/master/bench/serdes/versa_ecp5.py to the ECP5. Test PRBS on both side: Acorn / ECP5.

    bringup 
    opened by enjoy-digital 0
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